DDR3local_init_done一直拉低，无法初始化

问题：DDR3 local_init_done一直拉低，无法初始化
描述:

FPGAddr3local_init_done

有没有谁做过DDR3啊?为什么我的local_init_done一直拉低啊？用DDR3 SDRAM Controller with UniPHY的IP核控制，4片MT41J256M16 DDR3芯片代码就是对某个地址写，再立马读出来
always @(posedge afi_clk or negedge global_reset_n )
  if( !global_reset_n ) begin
         avl_size[2:0] <= 'd0;
avl_burstbegin <= 'd0;
avl_be[31:0] <= 'd0;
avl_write_req <= 'd0;
avl_read_req <= 'd0;
test_wr_data[3:0] <= 'd0;
wr_addr <= 'd0;
avl_wdata[3:0] <= 'd0;
avl_addr[25:0] <= 'd0;
rd_addr1 <= 'd0;
rd_addr2 <= 'd0;
rd_addr3 <= 'd0;
//state <= state + 1'b1;
state <= s0;
  end
  else
  begin
case(state)
s0:
begin
avl_size[2:0] <= 1;
avl_burstbegin <= 1'b1;
avl_be[31:0] <= 32'hffffffff;
avl_write_req <= 1;
avl_read_req <= 0;
test_wr_data[3:0] <= test_wr_data[3:0] + 1'b1;
wr_addr <= wr_addr + 1'd1;
avl_wdata[3:0] <= test_wr_data;
avl_addr[25:0] <= wr_addr;
rd_addr1 <= wr_addr;
rd_addr2 <= rd_addr1;
rd_addr3 <= rd_addr2;
//state <= state + 1'b1;
state <= ( state<<1 );
end
s1,s2,s3,s4,s5,s6,s7:
begin
avl_write_req <= 0;
avl_read_req <= 0;
avl_burstbegin <= 0;
//state <= state + 1'b1;
state <= ( state<<1 );
end
s8:
begin
avl_size[2:0] <= 3;
avl_burstbegin <= 1'b1;
avl_be[31:0] <= 32'hffffffff;
avl_read_req <= 1;
avl_write_req <= 0;
avl_addr[25:0] <= rd_addr3;
//state <= state + 1'b1;
state <= ( state<<1 );
end
s9,s10,s11,s12,s13,s14,s15:
begin
avl_read_req <= 0;
avl_write_req <= 0;
avl_burstbegin <= 0;
//state <= state + 1'b1;
state <= { state[ 14:0 ],state[ 15 ]};
end
default: state <= s0;
endcase
if(avl_rdata_valid == 1) //读输出有效数据
begin
test_rd_data <= avl_rdata;
end
  end
IP核配置：